Supported 65816 instructions
Due to legacy from xkas, Asar's MVN and MVP instructions are backwards from most other assemblers: the syntax is MVN dest, src. Also, a 16-bit argument like MVN $ssdd (where $ss is source, $dd is destination) is accepted too (edit: not in asar2 it isn't).
All other instructions use syntax recommended by WDC, with some additional liberties:
- for accumulator-addressed instructions (
inc aetc), theaargument can be omitted. cop,brkandwdmare assembled as 2-byte instructions, with with the second byte being optional and defaulting to zero.
; instruction: assembles to these bytes:
BRK ; 00 00
BRK #$12 ; 00 12
ORA ($12,x) ; 01 12
COP ; 02 00
COP #$12 ; 02 12
ORA $12,s ; 03 12
TSB $12 ; 04 12
ORA $12 ; 05 12
ASL $12 ; 06 12
ORA [$12] ; 07 12
PHP ; 08
ORA #$12 ; 09 12
ORA #$1234 ; 09 34 12
ASL A ; 0a
PHD ; 0b
TSB $1234 ; 0c 34 12
ORA $1234 ; 0d 34 12
ASL $1234 ; 0e 34 12
ORA $123456 ; 0f 56 34 12
BPL $12 ; 10 12
ORA ($12),y ; 11 12
ORA ($12) ; 12 12
ORA ($12,s),y ; 13 12
TRB $12 ; 14 12
ORA $12,x ; 15 12
ASL $12,x ; 16 12
ORA [$12],y ; 17 12
CLC ; 18
ORA $1234,y ; 19 34 12
INC A ; 1a
TCS ; 1b
TRB $1234 ; 1c 34 12
ORA $1234,x ; 1d 34 12
ASL $1234,x ; 1e 34 12
ORA $123456,x ; 1f 56 34 12
JSR $1234 ; 20 34 12
AND ($12,x) ; 21 12
JSL $123456 ; 22 56 34 12
AND $12,s ; 23 12
BIT $12 ; 24 12
AND $12 ; 25 12
ROL $12 ; 26 12
AND [$12] ; 27 12
PLP ; 28
AND #$12 ; 29 12
AND #$1234 ; 29 34 12
ROL A ; 2a
PLD ; 2b
BIT $1234 ; 2c 34 12
AND $1234 ; 2d 34 12
ROL $1234 ; 2e 34 12
AND $123456 ; 2f 56 34 12
BMI $12 ; 30 12
AND ($12),y ; 31 12
AND ($12) ; 32 12
AND ($12,s),y ; 33 12
BIT $12,x ; 34 12
AND $12,x ; 35 12
ROL $12,x ; 36 12
AND [$12],y ; 37 12
SEC ; 38
AND $1234,y ; 39 34 12
DEC A ; 3a
TSC ; 3b
BIT $1234,x ; 3c 34 12
AND $1234,x ; 3d 34 12
ROL $1234,x ; 3e 34 12
AND $123456,x ; 3f 56 34 12
RTI ; 40
EOR ($12,x) ; 41 12
WDM ; 42 00
WDM #$12 ; 42 12
EOR $12,s ; 43 12
MVP $12,$34 ; 44 12 34
EOR $12 ; 45 12
LSR $12 ; 46 12
EOR [$12] ; 47 12
PHA ; 48
EOR #$12 ; 49 12
EOR #$1234 ; 49 34 12
LSR A ; 4a
PHK ; 4b
JMP $1234 ; 4c 34 12
EOR $1234 ; 4d 34 12
LSR $1234 ; 4e 34 12
EOR $123456 ; 4f 56 34 12
BVC $12 ; 50 23
EOR ($12),y ; 51 12
EOR ($12) ; 52 12
EOR ($12,s),y ; 53 12
MVN $12,$34 ; 54 12 34
EOR $12,x ; 55 12
LSR $12,x ; 56 12
EOR [$12],y ; 57 12
CLI ; 58
EOR $1234,y ; 59 34 12
PHY ; 5a
TCD ; 5b
JML $123456 ; 5c 56 34 12
EOR $1234,x ; 5d 34 12
LSR $1234,x ; 5e 34 12
EOR $123456,x ; 5f 56 34 12
RTS ; 60
ADC ($12,x) ; 61 12
PER $1234 ; 62 34 12
ADC $12,s ; 63 12
STZ $12 ; 64 12
ADC $12 ; 65 12
ROR $12 ; 66 12
ADC [$12] ; 67 12
PLA ; 68
ADC #$12 ; 69 12
ADC #$1234 ; 69 34 12
ROR A ; 6a
RTL ; 6b
JMP ($1234) ; 6c 34 12
ADC $1234 ; 6d 34 12
ROR $1234 ; 6e 34 12
ADC $123456 ; 6f 56 34 12
BVS $12 ; 70 12
ADC ($12),y ; 71 12
ADC ($12) ; 72 12
ADC ($12,s),y ; 73 12
STZ $12,x ; 74 12
ADC $12,x ; 75 12
ROR $12,x ; 76 12
ADC [$12],y ; 77 12
SEI ; 78
ADC $1234,y ; 79 34 12
PLY ; 7a
TDC ; 7b
JMP ($1234,x) ; 7c 34 12
ADC $1234,x ; 7d 34 12
ROR $1234,x ; 7e 34 12
ADC $123456,x ; 7f 56 34 12
BRA $12 ; 80 12
STA ($12,x) ; 81 12
BRL $1234 ; 82 34 12
STA $12,s ; 83 12
STY $12 ; 84 12
STA $12 ; 85 12
STX $12 ; 86 12
STA [$12] ; 87 12
DEY ; 88
BIT #$12 ; 89 12
BIT #$1234 ; 89 34 12
TXA ; 8a
PHB ; 8b
STY $1234 ; 8c 34 12
STA $1234 ; 8d 34 12
STX $1234 ; 8e 34 12
STA $123456 ; 8f 56 34 12
BCC $12 ; 90 12
STA ($12),y ; 91 12
STA ($12) ; 92 12
STA ($12,s),y ; 93 12
STY $12,x ; 94 12
STA $12,x ; 95 12
STX $12,y ; 96 12
STA [$12],y ; 97 12
TYA ; 98
STA $1234,y ; 99 34 12
TXS ; 9a
TXY ; 9b
STZ $1234 ; 9c 34 12
STA $1234,x ; 9d 34 12
STZ $1234,x ; 9e 34 12
STA $123456,x ; 9f 56 34 12
LDY #$12 ; a0 12
LDY #$1234 ; a0 34 12
LDA ($12,x) ; a1 12
LDX #$12 ; a2 12
LDX #$1234 ; a2 34 12
LDA $12,s ; a3 12
LDY $12 ; a4 12
LDA $12 ; a5 12
LDX $12 ; a6 12
LDA [$12] ; a7 12
TAY ; a8
LDA #$12 ; a9 12
LDA #$1234 ; a9 34 12
TAX ; aa
PLB ; ab
LDY $1234 ; ac 34 12
LDA $1234 ; ad 34 12
LDX $1234 ; ae 34 12
LDA $123456 ; af 56 34 12
BCS $12 ; b0 12
LDA ($12),y ; b1 12
LDA ($12) ; b2 12
LDA ($12,s),y ; b3 12
LDY $12,x ; b4 12
LDA $12,x ; b5 12
LDX $12,y ; b6 12
LDA [$12],y ; b7 12
CLV ; b8
LDA $1234,y ; b9 34 12
TSX ; ba
TYX ; bb
LDY $1234,x ; bc 34 12
LDA $1234,x ; bd 34 12
LDX $1234,y ; be 34 12
LDA $123456,x ; bf 56 34 12
CPY #$12 ; c0 12
CPY #$1234 ; c0 34 12
CMP ($12,x) ; c1 12
REP #$12 ; c2 12
CMP $12,s ; c3 12
CPY $12 ; c4 12
CMP $12 ; c5 12
DEC $12 ; c6 12
CMP [$12] ; c7 12
INY ; c8
CMP #$12 ; c9 12
CMP #$1234 ; c9 34 12
DEX ; ca
WAI ; cb
CPY $1234 ; cc 34 12
CMP $1234 ; cd 34 12
DEC $1234 ; ce 34 12
CMP $123456 ; cf 56 34 12
BNE $12 ; d0 12
CMP ($12),y ; d1 12
CMP ($12) ; d2 12
CMP ($12,s),y ; d3 12
PEI ($12) ; d4 12
CMP $12,x ; d5 12
DEC $12,x ; d6 12
CMP [$12],y ; d7 12
CLD ; d8
CMP $1234,y ; d9 34 12
PHX ; da
STP ; db
JML [$1234] ; dc 34 12
CMP $1234,x ; dd 34 12
DEC $1234,x ; de 34 12
CMP $123456,x ; df 56 34 12
CPX #$12 ; e0 12
CPX #$1234 ; e0 34 12
SBC ($12,x) ; e1 12
SEP #$12 ; e2 12
SBC $12,s ; e3 12
CPX $12 ; e4 12
SBC $12 ; e5 12
INC $12 ; e6 12
SBC [$12] ; e7 12
INX ; e8
SBC #$12 ; e9 12
SBC #$1234 ; e9 34 12
NOP ; ea
XBA ; eb
CPX $1234 ; ec 34 12
SBC $1234 ; ed 34 12
INC $1234 ; ee 34 12
SBC $123456 ; ef 56 34 12
BEQ $12 ; f0 22
SBC ($12),y ; f1 12
SBC ($12) ; f2 12
SBC ($12,s),y ; f3 12
PEA $1234 ; f4 34 12
SBC $12,x ; f5 12
INC $12,x ; f6 12
SBC [$12],y ; f7 12
SED ; f8
SBC $1234,y ; f9 34 12
PLX ; fa
XCE ; fb
JSR ($1234,x) ; fc 34 12
SBC $1234,x ; fd 34 12
INC $1234,x ; fe 34 12
SBC $123456,x ; ff 56 34 12